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  4. Large-Scale Nonlinear Device-Level Power Electronic Circuit Simulation on Massively Parallel Graphics Processing Architectures

Large-Scale Nonlinear Device-Level Power Electronic Circuit Simulation on Massively Parallel Graphics Processing Architectures

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Primary Large-Scale_Nonlinear_Device-Level_Power_Electronic_Circuit_Simulation_on_Massively_Parallel_Graphics_Processing_Architectures.pdf (6.03 MB)

DOI

https://doi.org/10.7939/r3-h5k5-rr84

Date

2018-01-01

Author(s)

Shenhao Yan, Zhiyin Zhou, Venkata Dinavahi

Citation for Previous Publication

Link to Related Item

Abstract

Item Type

http://purl.org/coar/resource_type/c_6501 http://purl.org/coar/version/c_970fb48d4fbd8a85

Title

Large-Scale Nonlinear Device-Level Power Electronic Circuit Simulation on Massively Parallel Graphics Processing Architectures

Alternative

License

http://creativecommons.org/licenses/by-nc-nd/4.0/

Other License Text / Link

Subject/Keywords

Device-level modeling
Graphics processors
Insulated gate bipolar transistor (IGBT)
Large-scale circuits
Massive thread
Modeling
Numerical analysis
Parallel algorithms
Parallel architectures
Power diode
Power electronics
Simulation software

Language

en

Location

Time Period

Source

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Journal Articles (Electrical and Computer Engineering)
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