Do Inputs Matter? Using Data-Dependence Profiling to Evaluate Thread Level Speculation in the BlueGene/Q
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Abstract
In the era of many-core architectures, it is necessary to fully exploit the maximum available parallelism in computer programs. Thread Level Speculation (TLS) is a hardware/software technique that guarantees correct speculative parallel execution of the program even in the presence of may dependences. This thesis investigates the variability of dependence behaviour of loops across program inputs with the help of data-dependence profiling. This thesis also presents SpecEval, a new automatic speculative parallelization framework that uses single-input data-dependence profiles to evaluate the TLS hardware support in the IBM’s BlueGene/Q (BG/Q) supercomputer. A performance evaluation of TLS applied along with the traditional automatic parallelization techniques indicates that various factors such as: the number of loops speculatively parallelized and their coverage, mispeculation overhead due to dependences introduced from function calls inside loop body, increase in L1 cache misses due to long running (LR) mode in BG/Q and dynamic instruction path length increase impact the performance of TLS.